1. Field of the Invention
The present invention generally relates to the fabrication of microelectronic devices, and more specifically to the fabrication of a T-gate field effect transistor such as a high-electron mobility transistor using a self-aligned process.
2. Description of the Related Art
The high-electron mobility transistor (HEMT) is a variant of GaAs field effect transistor (FET) technology that offers substantially better performance than standard metal-semiconductor field-effect transistor (MESFET) devices, particularly at low temperatures. Usually fabricated by molecular beam epitaxy (MBE), in which layers are built up by deposition of molecules in a vacuum, a conventional HEMT uses an undoped GaAs channel with a thin doped layer of AlGaAs between the channel and metal gate. The doped layer furnishes the electrons for the channel.
The principal advantage of the device is that the electron mobility in the channel is higher in the HEMT than in a MESFET, because there are no dopant ions in the channel to scatter carriers. This gives HEMT devices a fast turn-on characteristic. They develop nearly their full transconductance with gate-logic voltages only slightly above the threshold. Furthermore, the thin gate insulator gives them comparatively high transconductance, and the effective electron velocities achieved are also higher than those in room-temperature MESFETs, so that potential clock speeds are also higher. HEMT devices are excellent candidates for building high-performance, very large scale integrated circuits, especially for operation at low temperatures.
HEMTs which may have T-shaped gates have conventionally been fabricated using a self-aligned, refractory metal gate process as disclosed in an article entitled "High-temperature stable W/GaAs interface and application to metal-semiconductor field-effect transistors and digital circuits", by J. Josefowicz et al, in Journal of Vacuum Science Technology, B 5(6), pp. 1707-1715, (November/December 1987). Refractory metal gates refer to gate metals which are thermally stable at temperatures on the order of 800.degree. C. These gate metals are highly resistive, and include tungsten silicide, tungsten nitride, and tungsten silicidenitride. In such a process, a refractory metal gate is formed with a nickel top, and a silicon implant is performed to create the source and drain regions on either side of the gate. The nickel is then stripped off, and the wafer is annealed at a temperature of approximately 800.degree. C. to activate the implant, creating N+ source and drain regions.
The refractory metal gate process suffers from serious drawbacks in that the gate is highly resistive, and the high temperature processing required to activate the implants is destructive to material systems which are desirable to employ in HEMT fabrication.
In order to control the intrinsic current characteristics of the device, the gate in a HEMT may be recessed into the channel region to a desired degree as disclosed in an article entitled "Narrow Recess HEMT Technology", by C. Wu et al, in Journal of Electrochemical Society, Vol. 134, no. 10, pp. 2613-2616 (October 1987). In such a process, the gate is realigned to the source and drain ohmic contacts. However, the realignment accuracy is limited by the proximity of the source metal. The metal reflects the incident electrons during the electron-beam lithography process, which distorts the resist profile severely. This limits the source-gate dimension to a minimum of 3000 angstroms. Similarly, the source-drain spacing within which the gate is placed has to be larger than 1 micron.
Another process which has been used in the fabrication of HEMTs involves the formation of a substitution or "dummy" gate, which is temporarily used for fabrication of the gate and source ohmic contacts prior to formation of the operative metallic gate. An example of a process using a substitution gate is disclosed in an article entitled "High-Speed GaAs Frequency Dividers Using a Self-Aligned Dual-Level Double Lift-Off Substitution Gate MESFET Process", by M. Chang et al, in IEEE Electron Device Letters, vol. EDL-6, no. 6, pp. 279-281 (June 1985). An exemplary dummy gate process is disclosed in an article entitled "5.9 ps/gate operation with 0.1 micron gate-length GaAs MESFETs", by Y. Yamane et al, IEDM Proceedings 1988, pp. 894-896. These processes require the formation of the substitution or dummy gates followed by the formation of the operative gates, involving numerous and intricate fabrication steps.